The present invention relates to a cryptrographic system.
When scrambling digital information data, it is the current practice to employ a random number generator which generates a random pattern of binary 1's and 0's with which the data are modulo-2 summed. Current random number generators are broadly classified into a first type in which the random number is dependent exclusively on the initial value and a second type in which the random number is dependent on the scrambled data. The first type of random number generators is susceptible to wire tapping because the repetitive sequence of bit pattern is easily discernible by eavesdroppers. The second type of prior art scramblers comprises a shift register coupled to the output of a modulo-2 adder which combines input data with the output of a cypher memory which stores a sequence of binary digits as a key code and reads the stored bits in response to an address code supplied from the shift register. The descrambler used in conjunction with such scramblers also comprises a shift register that supplies an address code for addressing the same key pattern as in the scrambler stored in a decipher memory the output of which is coupled to a modulo-2 adder to be combined with the scrambled input data. Should a bit error occur in the transmitted sequence, decoded data will be disrupted and such disruption will continue as long as the error bit is shifted in the shift register. If the number of the shift register stages is substantial, the disruption will continue for a long period of time even if the disruption is caused by a single bit error.